1. Technical Field
The present invention relates to a phase-change memory device, and more particularly, to a phase-change memory device and method that maintains the resistance of a phase-change material used in the memory device within a constant resistance range in a reset state.
2. Discussion of the Related Art
Phase-change random access memories (PRAMs) are non-volatile memory devices that store data using a phase-change material, e.g., Ge—Sb—Te (GST), whose resistance changes upon a phase transition due to a change in temperature.
The phase-change material of a PRAM cell goes into a crystalline state or an amorphous state depending on the temperature and duration of heating applied to the phase-change material, thereby storing data in the PRAM cell. In general, a high temperature above 900° C. is required for a phase transition of the phase-change material to occur. Such high temperatures are obtained by Joule heating caused by current flowing through the PRAM cell.
A write operation for the phase-change material will now be explained. First, the phase-change material is heated above its melting temperature by a current flowing through the phase-change material, and then it is rapidly cooled. Next, the phase-change material goes into the amorphous state and stores data, e.g., “1”. This state is referred to as a reset state. The phase-change material is then heated above its crystallization temperature for a predetermined period of time, and cooled. Next, the phase-change material goes into the crystalline form and stores data, e.g., “0”. This state is referred to as a set state.
A read operation for the phase-change material will now be explained. After a bit line and a word line are selected to select a memory cell using the phase-change material, an external current is provided to the selected memory cell. It is then determined whether data stored in the selected memory cell is, e.g., “1” or “0”, based on a voltage change caused by a resistance of the phase-change material of the selected memory cell.
The operation of writing data to a phase-change memory cell (e.g., a memory cell using a phase-change material) is initiated by Joule heating, which increases or decreases in proportion to a width of a bottom contact that contacts the phase-change material. Due to various reasons, however, such as defects arising during manufacturing, the widths of the bottom contacts that contact the phase-change materials may be non-uniform depending on the positions of the memory cells of a phase-change memory cell array. In addition, in memory cells having non-uniform bottom contact widths, phase-change materials do not completely enter the reset state. Thus, during the read operation, the resistances of the phase-change materials in the reset state may be non-uniform, causing failures during the read operation.
FIG. 1 shows a phase-change memory cell array 100 and positions of unit cells A, B, and C. FIGS. 2A through 2C illustrate different widths of bottom contacts that contact phase-change materials in the unit cells A, B, and C, respectively of FIG. 1. In particular, FIG. 2A illustrates a phase-change material and a bottom contact in the unit cell A of FIG. 1, FIG. 2B illustrates a phase-change material and a bottom contact in the unit cell B of FIG. 1, and FIG. 2C illustrates a phase-change material and a bottom contact in the unit cell C of FIG. 1.
It can be seen from FIGS. 2A through 2C that the widths of the bottom contacts that contact the phase-change materials may vary from cell to cell due to manufacturing defects. As shown in FIGS. 2A through 2C, the width (i) of the bottom contact that contacts the phase-change material in FIG. 2A is the smallest, the width (iii) of the bottom contact that contacts the phase-change material in FIG. 2C is the largest, and the width (ii) of the bottom contact that contacts the phase-change material in FIG. 2B is larger than the width (i) and smaller than the width (iii). Thus, when a phase-change material of a unit cell transits to the reset state due to the application of the reset current to the phase-change material, a contact resistance decreases as a width of a bottom contact that contacts the phase-change material increases. As a result, a transition to the reset state is delayed.
FIG. 3 is a graph illustrating a reset resistance range with respect to the position of a phase-change memory cell. In FIG. 3, it is assumed that a set resistance range of a phase-change material extends from 10 to 20KΩ and a reset resistance range of the phase-change material extends from 40 to 50KΩ. As can be seen from FIG. 3, when the same reset current is provided to, for example, the unit cells A, B, and C of FIG. 1, reset resistances vary among the unit cells A, B, and C.
The reset resistances of the unit cell A corresponding to FIG. 2A and the unit cell B corresponding to FIG. 2B lie in or above an average resistance range 40 to 50KΩ in the reset state. However, the reset resistance of the unit cell C corresponding to FIG. 2C showing the largest width (iii) lies below the average resistance range 40 to 50KΩ in the reset state. Thus, during an operation of reading data from the unit cells A and B, the states (e.g., the reset states) of the unit cells A and B can be sensed normally. However, during an operation of reading data from the unit cell C, the normal sensing operation cannot be performed and sensing failures may occur during the read operation.
As such, due to manufacturing defects, the widths of bottom contacts that contact phase-change materials may vary among different unit cells in a phase-change memory cell array. Thus, the phase-change materials of the unit cells in a reset state have different resistances and failures may occur during read operations.